Key to its success is the incorporation of the Gen 2.0 x8 PCI Express bus interface on its back-end, an advancement that doubles the data rate of the Gen 1.0 bus for the ultimate high speed access to host memory in multi-camera systems, while using the same compact footprint and connectors.
The Cyton CXP4 brings powerful development capabilities to machine vision, industrial automation and inspection, or surveillance design projects. By supporting the CoaXPress (CXP) standard on its front end, it facilitates video capture speeds of up to 6.250 Gigabits/second (Gb/S) in applications deploying one to four CXP-6 cameras. CXP also allows control commands, triggers and power to be sent to and from cameras over the same 75 Ohm coaxial cable, greatly reducing installation costs.
As with past interface products from BitFlow, the Cyton CXP4 supports not only simple triggering modes but also complicated, application-specific triggering and control interactions within any hardware environment. In addition, the Cyton promotes more application flexibility with its capability to be aggregated in support of even higher data rates; for example, four links delivering a staggering 25 Gb/S of data.
"Along with its four CXP connections, the Cyton CXP4 contains a fifth CXP connector serving as a high-speed uplink capable of running the full 6.25 Gb/S from the frame grabber to the camera, a feature that effectively future-proofs the board," explained Donal Waide, Director of Sales for BitFlow. "As the CXP standard rapidly evolves, demands for bulk uploads to the camera and precise trigger accuracy are already outstripping the current 20 Mb/S uplink specification, and have made a high-speed uplink a necessity. The Cyton-CXP4 is fully ready when the new CXP standard is released that defines when and how this uplink will be used."
Gen 2.0 PCI Express
System designers will appreciate the added speed of the Gen 2.0 x8 PCI Express bus interface, along with the greater accuracy it achieves in bio-medical, parts inspection and other high-precision applications. Cyton CXP4 boards will work not only x16 and x8 PCI slots, but also, as is becoming a trend, x4 and x1 slots that use x16 connectors. It is fully backwards compatible with Gen 1.0 motherboards to assist in the cost-effective migration to Gen 2.0.
Camera Control and I/O
Camera control and flexibility are crucial to vision system success. That is why the Cyton CXP board features programmable ROI (Region Of Interest) sub-windowing and is supported by the CamEd GUI camera file editing utility, enabling it to acquire fixed or variable size images. Plus, because the CoaXPress 1.0 specification for one high-speed trigger is supported, the I/O signals can be routed to and from an extensive variety of internal and external destinations, making the flexibility of the routing unprecedented in the machine vision industry. In addition, there are separate hardware I/O signals which can be connected to and from external sources. Each connected CXP camera has a full set of these signals that can be run independently.
SDK Simplifies Deployment
BitFlow packages its frame grabber with its acclaimed SDK -- which supports both 32-bit and 64-bit operating systems -- to allow users to create, modify and test configuration files quickly, without requiring knowledge of the frame grabber's internal architecture. Applications can be developed using C/C++/.NET and BitFlow's sophisticated buffer management APIs. In addition, free drivers can be download from the BitFlow web site for most third-party machine vision packages.